Why kernel's arm64 vector table is aligned with 11?

In arch/arm64/kernel/entry.s, vector table is aligned with 11.

    .align  11  ENTRY(vectors)      kernel_ventry   1, sync_invalid         // Synchronous EL1t      kernel_ventry   1, irq_invalid          // IRQ EL1t      kernel_ventry   1, fiq_invalid          // FIQ EL1t      kernel_ventry   1, error_invalid        // Error EL1t        kernel_ventry   1, sync             // Synchronous EL1h      kernel_ventry   1, irq              // IRQ EL1h      kernel_ventry   1, fiq_invalid          // FIQ EL1h      kernel_ventry   1, error            // Error EL1h        kernel_ventry   0, sync             // Synchronous 64-bit EL0      kernel_ventry   0, irq              // IRQ 64-bit EL0      kernel_ventry   0, fiq_invalid          // FIQ 64-bit EL0      kernel_ventry   0, error            // Error 64-bit EL0    #ifdef CONFIG_COMPAT      kernel_ventry   0, sync_compat, 32      // Synchronous 32-bit EL0      kernel_ventry   0, irq_compat, 32       // IRQ 32-bit EL0      kernel_ventry   0, fiq_invalid_compat, 32   // FIQ 32-bit EL0      kernel_ventry   0, error_compat, 32     // Error 32-bit EL0  #else      kernel_ventry   0, sync_invalid, 32     // Synchronous 32-bit EL0      kernel_ventry   0, irq_invalid, 32      // IRQ 32-bit EL0      kernel_ventry   0, fiq_invalid, 32      // FIQ 32-bit EL0      kernel_ventry   0, error_invalid, 32        // Error 32-bit EL0